Question

求eda数字钟设计程序请根据要求在EDA实验箱上设计实用数字钟系统,要求：⑴使用EDA实验箱上的6个LED数码管从左到右

Answer 1

1.Topclock（元件例化 顶层文件）

Library ieee;

Use ieee.std_logic_1164.all;

Use ieee.std_logic_arith.all;

Use ieee.std_logic_unsigned.all;

Entity topclock is

Port(clk,clr,en,m1,h1:in std_logic;

alarm:out std_logic;

secs,secg,mins,ming,hours,hourg:buffer std_logic_vector(3 downto 0));

End;

2.秒模块程序

library ieee;

use ieee.std_logic_1164.all;

use ieee.std_logic_unsigned.all;

entity SECOND is

port(clk,clr:in std_logic;

sec1,sec0:out std_logic_vector(3 downto 0);

co:out std_logic);

end SECOND;

architecture SEC of SECOND is

begin

process(clk,clr)

variable cnt1,cnt0:std_logic_vector(3 downto 0);

begin

if clr='1' then

cnt1:="0000";

cnt0:="0000";

elsif clk'event and clk='1' then

if cnt1="0101" and cnt0="1000" then

coa);

u2:min1 port map(clr=>clr,alarm=>alarm,

mins=>mins,ming=>ming,clkm=>b,enmin=>c);

u3:hour1 port map(clr=>clr,

hours=>hours,hourg=>hourg,clkh=>d);

u4:madapt port map(en=>en,m1=>m1,clk=>clk,secin=>a,minset=>b);

u5:hadapt port map(en=>en,h1=>h1,clk=>clk,minin=>c,hourset=>d);

end;