六进制计数器源程序cnt6.vhd:
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY CNT6 IS
PORT (CLK,CLRN,ENA,LDN:IN STD_LOGIC;
D:IN STD_LOGIC_VECTOR(3 DOWNTO 0);
Q:OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
COUT:OUT STD_LOGIC);
END CNT6;
ARCHITECTURE ONE OF CNT6 IS
SIGNAL CI:STD_LOGIC_VECTOR(3 DOWNTO 0):="0000";
BEGIN
PROCESS(CLK,CLRN,ENA,LDN)
BEGIN
IF CLRN='0' THEN CI